Technical demo · commercial evaluation funnel

Fit more model
into less silicon.

MicroQuant turns supported neural networks into compact, deterministic firmware for constrained microcontrollers. This site presents the current technical demonstration, exact-board quality evidence, memory footprint, and the pathway to a model-specific commercial pilot.

Best current top-1
92.24%

W8 on the frozen Speech Commands v2 acceptance role.

Smallest W4 product flash
24,566 B

PCQ4 under the validated generic-SWAR build.

MicroQuant peak SRAM
30,712 B

Measured footprint for the validated generic-SWAR cells.

Accepted quality cells
12 / 12

Every W8, W4, and mixed MicroQuant physical cell exceeded 90%.

Current platform

A compact deployment stack, scoped to your product.

The compiler, generated assets, and zero-heap runtime form one deterministic delivery path. Format and precision choices are evaluated against the customer's accuracy, flash, SRAM, graph, and target.

Validated today

Accuracy-preserving choices

W8, PCQ4, SPQ4, KARQ P1/P4, and automatic mixed precision are implemented across the current DS-CNN validation matrix. Every MicroQuant candidate clears the accepted 90% quality floor.

Compact delivery

Flash and SRAM visibility

Every physical cell carries complete firmware flash, product-attributable flash, static internal SRAM, activation arena, stack, and peak internal SRAM accounting.

Commercial pathway

From assessment to pilot

A paid assessment confirms graph coverage and footprint fit. A scoped pilot then delivers generated assets, target integration, acceptance evidence, and licensing terms for the customer's product.

This website is a technical demo and commercial funnel.

It is not a self-serve production compiler and does not distribute customer-ready generated assets. Production delivery is model-, data-, board-, toolchain-, and license-specific.

Scope a commercial pilot

W8

Highest current KWS accuracy and the original stricter-gate pass.

PCQ4

Per-channel INT4 control with the smallest current W4 product flash.

SPQ4

Per-block INT4 scales for locally varied weights and structured sparsity.

KARQ + mixed

Exponent-palette and layer-selection options for model-specific tradeoffs.

Current exact-board results

Quality and footprint across the complete ABI-v6 KWS matrix.

One frozen 12-class DS-CNN, one untouched 4,769-record Speech Commands v2 acceptance role, and fourteen physical cells under generic-SWAR/PIE on the ESP32-S3-DevKitC-1 N16R8 with ESP-IDF v6.0.2.

Validation complete 14 physical cells; three independent clean sessions per cell.
Quality accepted 12 MicroQuant W8/W4/mixed cells; all above 90% top-1.
Exact scope Sensorless frozen-feature KWS; no live-audio, energy, or cross-ISA claim.

Speech Commands v2 DS-CNN

Accuracy, flash, and peak internal SRAM from the sealed physical matrix.

All MicroQuant cells > 90%
Configuration Backend Top-1 Product flash Complete firmware flash Peak internal SRAM
TFLM controlPortable91.99%262,944 B262,944 B55,936 B
TFLM + ESP-NN controlESP-NN91.99%291,424 B291,424 B56,400 B
W8generic-SWAR92.24%34,678 B201,216 B30,712 B
W8PIE92.24%34,909 B201,424 B30,744 B
PCQ4generic-SWAR91.36%24,566 B191,120 B30,712 B
PCQ4PIE91.36%24,797 B191,312 B30,744 B
SPQ4 g8generic-SWAR91.70%34,118 B200,656 B30,712 B
SPQ4 g8PIE91.70%34,349 B200,864 B30,744 B
KARQ P1generic-SWAR91.40%25,998 B192,528 B30,712 B
KARQ P1PIE91.40%26,229 B192,752 B30,744 B
KARQ P4generic-SWAR90.14%34,818 B201,360 B30,712 B
KARQ P4PIE90.14%35,049 B201,568 B30,744 B
Automatic mixedgeneric-SWAR91.03%30,838 B197,392 B30,712 B
Automatic mixedPIE91.03%31,069 B197,584 B30,744 B

“Product flash” is the product-attributable linked footprint defined by the sealed comparison contract. “Complete firmware flash” includes the full application image under the same accounting rules. Accuracy is a property of each frozen quantized asset; generic-SWAR and PIE use the same asset and therefore share the same top-1 result.

The accepted commercial quality floor is 90% for W4 and mixed candidates. The earlier, stricter preregistered host gate is preserved separately; W8 is the only MicroQuant configuration that passed that original gate.
Download the footprint-only machine-readable result →

Bit-exact execution

Every MicroQuant cell matched the declared host predictions and logits on the physical board.

Repeatable builds

Each cell was compiled and validated across three independent clean sessions with content-addressed artifacts.

Bounded claims

The evidence applies only to the named model, board, SDK, feature role, and frozen acceptance set.

Deployment coverage

What can be evaluated and delivered today.

Standard capabilities, limited subsets, custom engagement paths, and out-of-scope cases are separated so a buyer can qualify fit before a pilot.

Supported standard path Limited stated subset Custom scoped engagement Outside scope different solution required

Operators

Dense / Gemm / MatMul (constant weights, bias, transB)Supported
ReLU / Clip(clamp) fused as dense/conv activationsSupported
Identity / Flatten / Reshape (shape-safe)Supported
Conv2D — 1×1 pointwise & 3×3, stride 1/2, same/validSupported
Depthwise Conv2D 3×3 (channel multiplier 1)Supported
MaxPool / AvgPool 2×2 s2 · GlobalAveragePoolSupported
Softmax (argmax / top-k on int32 logits)Limited
Hidden-layer sigmoid / tanh (fixed-domain LUT)Supported
Attention / transformer, GELU, final-layer sigmoid/tanhRejected
The CNN path is correctness-first: every supported layer is bit-exact between the host reference and the generated C++, including padding and stride variants. NHWC layouts and static shapes only.

Quantization Backends & Import Formats

spq4 — signed-int4-per-block-fixed-scale; operators: dense, conv2d, depthwise_conv2ddefault · portable-runtime · promoted physical evidence scoped by environment
karq — signed-int4-exponent-palette; operators: dense, conv2d, depthwise_conv2dselectable · portable-runtime · promoted physical evidence scoped by environment
pcq4 — per-channel INT4 comparison baselineFully implemented · evaluation baseline
Raw float32 weights .bin / .rawSupported
ONNX — Gemm / MatMul / Relu / Clip / Identity / Flatten / Reshape (strict subset)Supported
cnn-json explicit NHWC specSupported
ONNX Conv → NHWC conversion (static CNN subset)Supported
TFLite ingestion (stdlib flatbuffer reader, documented subset)Supported
PyTorch / Keras (via export to ONNX)Indirect
SPQ4 provides local scales and structured-sparsity support; KARQ provides exponent-palette choices; PCQ4 remains the per-channel comparison control. The appropriate format is selected against the customer's accuracy, flash, and SRAM requirements. Unsupported graph combinations are identified before asset generation.

MCU Families & Boards · ISA Features

rp2350-arm-m33 · board pico2-rp2350-arm (Raspberry Pi Pico 2)Silicon-validated: SPQ4 dense, generic-swar
rp2350-riscv-hazard3 · board pico2-rp2350-riscv (Pico 2, RISC-V path)Cross-compile verified
generic-cortex-m7 (ARMv7E-M · arm-dsp, simd32, FPU)Compiles
generic-cortex-m55 (ARMv8.1-M · arm-dsp + Helium/MVE)Compiles
esp32-s3 (Xtensa LX7 · board esp32-s3-devkitc1-n16r8)Silicon-validated: ABI-v6 KWS W8/W4/mixed under generic-SWAR and PIE, ESP-IDF v6.0.2
portenta-h7-m7 (STM32H747 M7 only · board arduino-portenta-h7-m7)Integration-ready board pack
generic-rv32imac (RISC-V RV32IMAC)Cross-compile verified
Board nucleo-h743zi (concrete BSP template)Available as a custom board engagement
ISA caps: arm-dsp · arm-mve · riscv-p · riscv-v · xtensa-simd · custom:*Declarable; kernels vary
Targets capture the MCU, memory map, toolchain, SDK, and runtime contract needed for a repeatable integration. Physical proof is committed for Pico 2 Arm and ESP32-S3 N16R8. The current ESP32-S3 result covers the complete ABI-v6 Speech Commands KWS matrix under generic-SWAR and PIE with ESP-IDF v6.0.2.

Kernel Backends · Runtime Ports · Evidence

Kernel generic-swar (portable INT4 MAC, always-safe fallback)Available
Kernel arm-dsp-smuad (Cortex-M4/M7 __SMUAD)Available
Kernel esp32-s3-pie (Xtensa PIE packed-S4 bank)Complete-model exact-board validation · bit-exact
Kernels Helium/MVE · RISC-V P/VAvailable through target-specific kernel work
Ports: host · baremetal-generic · cortex-m scaffold · RP2350 Arm/RISC-V · STM32H7 M7 · ESP32-S3 · custom MQ_PORT_HEADERSupported
Evidence — host benchmark & bit-exact parityIncluded
Evidence — QEMU semihosting (labeled qemu)KARQ dense + CNN passed · QEMU 11.0.2
Evidence — physical validation on real silicon (RP2350 SPQ4; ESP32-S3 ABI-v6 KWS matrix)Delivered ✓
Evidence — model-attributed flash and RAM accountingDelivered across the current KWS matrix
Evidence — ABI-v6 Speech Commands v2 KWS, sensorless frozen-feature inferenceDelivered · 14 physical cells · all W8/W4/mixed candidates above 90% top-1
Evidence — cross-ISA KARQ validationNot claimed — validated on one ISA to date
Physical validation means firmware was built, flashed, and checked on the named board. The current KWS result is limited to one Speech Commands v2 DS-CNN, frozen MFCC features, ESP32-S3-DevKitC-1 N16R8, and ESP-IDF v6.0.2; it is not a microphone, live-audio, energy, or cross-ISA claim. All W4/W8/mixed cells pass the accepted 90% commercial quality floor; only W8 passed the original stricter preregistered composite gate.

Validated Toolchains & SDKs

Python — compiler host>=3.12; tested 3.12/3.13/3.14
ONNX — model import1.22; evidence 1.22.0
Arm GNU Toolchain — firmware toolchain15.3.Rel1; evidence arm-none-eabi-gcc (Arm GNU Toolchain 15.3.Rel1 (Build arm-15.149)) 15.3.1 20260627
Raspberry Pi Pico SDK — vendor SDK2.3.0
ArduinoCore-mbed — vendor SDK — Portenta4.6.0
Espressif ESP-IDF — vendor SDK — ESP32-S3v6.0.2
QEMU — emulation11.0.2; evidence QEMU emulator version 11.0.2
The exact toolchain and SDK versions this release is built and validated against. Vendor SDK rows also fix their subordinate compiler, debugger, and flasher identities, so a delivered result can be reproduced rather than approximated. Other versions are frequently fine; these are the ones we can state as tested. Tell us which toolchain you are on and we will confirm before any engagement starts.

Commercial pathway

Start with a decision-ready model assessment.

The first engagement establishes whether MicroQuant fits your graph, quality target, flash budget, SRAM budget, target MCU, and production environment before deeper integration work begins.

Assessment deliverables

  • Supported-operator and import-path qualification.
  • W8, W4, and mixed-precision quality study on representative data.
  • Product flash, complete firmware flash, and SRAM footprint.
  • Target and toolchain integration scope.
  • Commercial pilot proposal with acceptance criteria and licensing.

Pilot deliverables

  • Versioned compiler configuration and generated assets.
  • Runtime and firmware integration for the agreed target.
  • Host and physical-board parity evidence.
  • Reproducible footprint report and artifact manifest.
  • Handoff documentation for the customer's firmware team.
Strong fit

Constrained embedded ML

Dense networks, compact CNNs, keyword spotting, and anomaly models where accuracy, flash, SRAM, and deterministic allocation matter.

Qualify first

Graphs outside the current surface

Attention-heavy networks, dynamic shapes, unsupported activations, or targets without an agreed integration path require separate scoping.

Commercial licensing

Clear evaluation and production boundaries.

MicroQuant is proprietary commercial software. Evaluation access supports technical review; shipping products require a commercial license and a customer-specific validation record.

Commercial product use

  • Per-product or portfolio licensing.
  • Source, generated-asset, and integration scope defined in writing.
  • Support and maintenance terms matched to the product lifecycle.

Evaluation use

  • Internal technical review under the evaluation terms.
  • No production, resale, or customer-facing deployment.
  • No model or dataset upload through this website.
Read the commercial EULA

Start a conversation

Tell us what needs to fit.

Share the model class, target MCU, quality requirement, flash budget, and SRAM budget. We will respond with a clear fit assessment and a scoped next step.

What the first review covers

Model fit

Graph coverage, import path, calibration data, and accuracy target.

Memory fit

Flash, SRAM, static allocation, and integration constraints.

Commercial fit

Assessment scope, pilot deliverables, licensing, and product roadmap.

Model assessment intake

Model
Target
Product requirements
Reviewed by the MicroQuant team. NDA available. No marketing list. We store only what you enter to assess and respond to this request. No model or dataset is uploaded through this form.

Request received

We will review the model and target details and reply to name@company.com with a scoped next step or a clear no-fit.